Location: Yerevan, Armenia
Category: Hardware Design / Engineering
Type: Full time
Deadline: 30-Aug-18 00:00:00
Salary:
Description
Responsibilities
Layout design and DRC/LVS verification of NVM memory blocks. These include MTP/OTP memories as well as IP/Chip development and verification. Opportunities to layout in Finfet technology and chip routing as well. Define and develop recommendations to NVM special devices/block solutions. Close work with analog design engineers.
RequiredQualifications
- Analog and mixed signal block layout design and verification experience (>3 years)
- Demonstrates good analysis and problem-solving skills.
- Experience of layout development /verification tools are required.
- Experience in layout techniques to meet ESD, latch up, antenna requirements.
- Good English written and verbal communication skills.
- Finfet, HV device knowledge is a plus․
Benefits
Job URL: iJob.am - Mid-Level AMS Layout Design Engineer / 17160BR @ Synopsys Armenia CJSC
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